Tachyum utilizes the new EDA process, Increased Prodigy processor core count to 192
At the 2018 Hot Chips conference, Tachyum unveiled the conceptual design of the Prodigy Universal Processor, capable of running any code through its dynamic binary translator with exceptional execution and translation efficiency. Last year, Tachyum introduced Prodigy, commencing pre-orders for its evaluation platform. The pinnacle of its offerings is the T16128-AIX, boasting 128 cores with a TDP of 950W. Tachyum asserts that Prodigy’s double-precision floating-point performance is thrice that of NVIDIA’s H100, while its AI FP8 performance is a staggering sixfold.
Recently, Tachyum announced enhanced design outcomes by employing novel EDA tools during Prodigy’s physical design phase. The triumph includes a boost in core count from an initial 128 to an impressive 192, a 50% increment, with a marginal chip size increase from 500mm² to 600mm² to accommodate the additional cores. Following an IP switch, Tachyum’s design team also transitioned to alternative RTL simulation and physical design tools, optimizing configurations and selections.
Further refinements in Prodigy’s physical design phase encompass:
- Increase of the chip L2/L3 cache from 128MB to 192MB
- Support of DDR5 7200 memory in addition to DDR5 6400
- More speed with 1 DIMM per channel
- Larger package accommodates additional 32 serial links and as many as 32 DIMMs connected to a single Prodigy chip
Prodigy is heralded as the world’s premier Universal Processor, proficient in undertaking CPU, GPU, and TPU tasks within a single chip. It can seamlessly run native, as well as x86, Arm, and RISC-V binaries. When juxtaposed with competitors, it offers cost-saving measures while delivering formidable computational prowess. Employing Tachyum’s proprietary architecture, it’s crafted using TSMC’s N5P process, crowned with 192 64-bit cores, and complemented by 16 DDR5 memory controllers, accommodating both dual and quad platforms.
