Intel Arrow Lake-S power consumption specifications exposed, PL2 is 177W, PL4 is 333W

Intel’s forthcoming Arrow Lake is anticipated to debut in the fourth quarter of the ensuing year, with its desktop iteration, Arrow Lake-S, being designed for the LGA 1851 socket. While the official unveiling of Arrow Lake-S remains a distant horizon, Intel’s recent disclosure of its client CPU roadmap for 2024-2025 has ushered in a cascade of details pertaining to Arrow Lake-S.

Recent revelations from informed sources have shed light on the power consumption specifications of Arrow Lake-S. Its flagship chipset is poised to incorporate eight P-Cores and sixteen E-Cores. The models suffixed with “K/KF” have a PL1 of 125W, PL2 at 177W, and PL4 reaching 333W. In juxtaposition with Raptor Lake-S, there’s a decrement of 76W or roughly 30% in PL2 and an 83W or approximately 21% reduction in PL4. Additionally, the TaU duration stands at 56 seconds.

  • Raptor Lake 125W (PL1/PL2/PL4) 24 Core SKU – 125W / 253W / 420W
  • Raptor Lake 125W (PL1/PL2/PL4) 24 Core SKU – 125W / 253W / 420W

At this juncture, it remains nebulous whether these figures represent the final retail configuration or are exclusively pertinent to engineering samples. Should these metrics be authentic, it intimates that Arrow Lake-S might surpass the energy efficiency of the 13th/14th generation Core desktop processors fabricated on Intel’s 7 processes.

Gleaning from the repository of leaked intel, the comprehensive configuration portfolio for Arrow Lake-S encompasses:

  • Arrow Lake-S 24 (8P + 16E) / 4 Xe Cores / 125W TDP
  • Arrow Lake-S 24 (8P + 16E) / 4 Xe Cores / 65W TDP
  • Arrow Lake-S 24 (8P + 16E) / 4 Xe Cores / 35W TDP

Arrow Lake-S’s P-Cores will be architected on the Lion Cove blueprint, while the E-Cores will leverage the Skymont architecture. Concurrently, Intel is slated to usher in a novel process for Arrow Lake-S. The computation module is predicted to utilize the Intel 20A process, with the GPU module crafted on TSMC’s 3nm process. It’s projected that the SOC and I/O modules will continue to employ TSMC’s 6nm process. Yet, whispers are rife that the computation module might also resort to TSMC’s 3nm process. Furthermore, Arrow Lake-S’s integrated graphics will introduce the Xe- LPG architecture predicated on Alchemist, promising a significant surge in performance.