In fact, Samsung’s competitor SK Hynix has begun to apply MSAP packaging technology on DDR5 memory, but Samsung intends to do so from DDR6 memory. MSAP packaging technology allows DRAM makers to create memory modules with finer circuits that have better connectivity for higher data transfer speeds. In addition, MSAP packaging technology can not only strengthen the connection of circuits, but also increase the number of PCB layers of DDR6 memory.
Younggwan Ko said that with the increase in memory chip capacity and data speed, the package design must also adapt to the needs of the new generation of products. The increase in the number of layers and the complexity of the process makes the size of the memory packaging market expected to grow exponentially.
Samsung expects that the design of DDR6 memory will be completed in 2024, and the official commercial use will wait until 2025. It is rumored that the data transmission speed will reach 12,800 Mbps according to the JEDEC specification, and it can reach 17,000 Mbps or more after overclocking.
In terms of fan-out packaging, Samsung has launched both fan-out-wafer-level packaging (FO-WLP) and fan-out-panel-level packaging (FO-PLP), the latter has more advantages in 12-inch wafers, and Samsung is considering it for larger chips. It is understood that in May of this year, Samsung put fan-out-panel-level packaging on the SoC used by Google’s Pixel series, which means that the technology has gradually matured.