The JEDEC Solid State Storage Association officially released the JESD209-5 standard Low Power Double Data Rate 5, or LPDDR5, in early 2019. The rate is 6400MT/s, which is directly doubled compared to the 3200MT/s rate of the first version of LPDDR4, even 50% faster than the 4266MT/s rate of LPDDR4X, which will significantly improve including smartphones and tablets memory efficiency in application scenarios such as ultra-thin and ultra-thin computers
In order to improve performance, LPDDR5 redesigned its architecture, switched to 16Banks programmable and multi-clocking architecture, and introduced two new instructions, Data-Copy and Write-X. In addition, taking into account the needs of automobiles and related markets, LPDDR5 also introduces a link ECC error correction function. The voltage of LPDDR5 is 1.1V like LPDDR4X, the signal voltage is 250mV, but the current will be reduced by 40% in idle state, which can greatly reduce power consumption.
Today, JEDEC Solid State Storage Association officially announced the JESD209-5B standard, the LPDDR5X standard developed by JEDEC’s JC-42.6 Low-Power Memory Subcommittee. This is an optional extension to LPDDR5, focusing on improving performance, power consumption, and flexibility, and aims to improve memory performance in application scenarios including 5G communication performance, automotive high-resolution augmented reality/virtual reality, and edge computing using AI.
- Speed extension up to 8533 Mbps (versus up to 6400 Mbps in the previous revision)
- Signal Integrity improvements with TX/RX equalization
- Reliability improvements via the new Adaptive Refresh Management feature
Micron, Samsung, and Synopsys have all participated in the standardization of LPDDR5X. All parties hope that the new standard can pave the way for the next generation of smartphones, laptops, and other mobile computing devices, open the door to 5G and AI applications and provide a better user experience for memory-intensive applications such as games, photography, and streaming.