AMD EPYC Venice with Zen 6 architecture will use the SP7 platform

Currently, AMD’s fourth-generation EPYC lineup awaits the debut of the EPYC 8004, codenamed ‘Siena.’ This model targets single-socket, entry-level servers, prioritizing density and performance-per-watt optimization, catering specifically to edge computing and the telecommunications sector. It’s rumored to adopt a more compact SP6 (LGA 4094) package and is anticipated to launch in the remaining months of this year. Subsequently, AMD’s focal point will shift towards the EPYC Turin, based on the Zen 5 architecture. Both the fourth and fifth-generation EPYC processors will utilize the SP5 and SP6 sockets, but the succeeding generation will transition to the SP7 platform.

@yuuki_ans unveiled the latest server processor roadmap. If this representation holds true, AMD could potentially launch the EPYC Venice, architected on Zen 6, between 2025 and 2026. This will be anchored to the SP7 platform. Current information about this new platform is scarce. However, the diagram indicates SP7 variants with 12-channel and 16-channel DDR5, likely supporting higher memory frequencies and PCI-E 6.0. Present indications suggest that AMD’s Zen 6 will employ a 2nm process. Speculations are rife that Venice might be the first processor to exceed 384 cores, though such conjectures lack concrete evidence.

Adopting a novel processor socket implies that the Zen 6-based EPYC Venice might feature a unique packaging method to accommodate an increased number of chiplets. This might be a strategic countermeasure to Intel’s consistent enlargement of CPU dimensions in the data center landscape. As both tech giants delve into stacking more compute chiplets to amplify performance and efficiency, avant-garde packaging techniques are poised to play a pivotal role in future CPU architectures.

The EPYC Turin, underpinned by the Zen 5 architecture, is slated for a release no sooner than next year. Thus, the unveiling of EPYC Venice is projected between 2025 and 2026. Presently, myriad uncertainties surround it, and AMD remains equipped to adapt its design in response to emerging shifts.