The SiFive Performance P650 can be equipped with up to 16 cores. Its design is based on the P550 to maintain an efficient pipeline while expanding the processor instruction issue width to achieve a 40% increase in IPC performance. Through enhanced architecture, Performance P650 has increased the overall performance by 50% compared to the previous generation flagship product Performance P550 with the strongest performance. SiFive said that compared with Arm Cortex-A77, it has obvious performance advantages per unit area.
At present, SiFive did not disclose the specific frequency and design details of the Performance P650. Previously, Performance P550 adopted a 13-stage pipeline, three launches, and out-of-order execution micro-architecture. Each core has its own 32KB first-level instruction cache and 32KB first-level data cache, L2 cache, a single cluster has up to 4 cores, shared 4MB L3 cache, supports Linux and complete RISC-V vector extension v1.0rc. Intel also uses Performance P550 to build its own RISC-V development platform “Horse Creek”, which may even be Intel’s first 7nm product.
SiFive co-founder and chief technology officer Yunsup Lee said that SiFive responded to the semiconductor industry’s call for more processor IP, focusing on bringing processor technology based on the RISC-V architecture to the market. Since the release of the Performance series of cores earlier this year, SiFive has constantly sought opportunities to break through the performance limits, and this processor has fulfilled its commitment to continuously improve performance.
The preview version of SiFive Performance P650 will be available to head partners in the first quarter of 2022, and related products will be launched in the middle of the year, providing strong support for data center, mobile, vehicle, edge computing, and other fields.