Google Tensor G5 may use TSMC 3nm process node
This year, Google unveiled the Tensor G3, its inaugural smartphone SoC supporting the AV1 codec, which is employed in its flagship products, the Pixel 8 and Pixel 8 Pro. However, in comparison to Qualcomm’s third-generation Snapdragon 8 and MediaTek’s Dimensity 9300, the Tensor G3 significantly lags, with a widening performance gap that has been a source of disappointment and has compelled Google to seek new directions.
According to media reports, Google is contemplating adopting TSMC’s 3nm process node, such as the N3E technology, for its Tensor G5. This move would at least bring Google’s SoC manufacturing process in line with Qualcomm and MediaTek. Beyond the manufacturing technique, Google plans to abandon Samsung’s SoC design, focusing instead on a fully customized solution, and may even introduce an internally developed new GPU to enhance the overall performance of the SoC.
Moreover, Google’s focus extends beyond CPU and GPU performance. How to improve energy efficiency and AI capabilities are also pivotal considerations, as it aims to develop a chip that synergizes more effectively with its software requirements. However, these advancements are not expected until 2025 at the earliest, meaning that Google’s first fully customized SoC might not debut until the Pixel 10 and Pixel 10 Pro.
As for the upcoming “Zuma Pro” Tensor G4, Google will continue its collaboration with Samsung. Rumored to be a minor update, it will be featured in the Pixel 9 and Pixel 9 Pro. Reports have indicated that the Tensor G4 prototype has been operational on a development platform named “Ripcurrent Pro,” with Samsung’s development department assisting. It might also incorporate elements of the Exynos 2400 design, with both being manufactured using the 4LPP+ process.
Google has no plans to switch its foundry for the Tensor G4, not only due to timing but also due to cost considerations, as the expense of transitioning to TSMC’s 3/4nm process at this stage is prohibitively high.
