PCI-SIG confirms that PCIe 5.0 & 6.0 will use a new cable design called CopprLink
Recently, the PCI-SIG convened the SC23 conference at the Denver Colorado Convention Center in the United States, showcasing to its members the advancements in PCIe technology and introducing a new naming scheme for PCI Express high-speed cables, underscoring PCIe technology’s preeminence in high-performance computing interconnects. PCI-SIG revealed that the new nomenclature for internal and external PCIe cables is “CopprLink.” Presently, the organization is formulating specifications for internal and external cables for PCIe 5.0 and PCIe 6.0, to release them within this year.
The PCI-SIG’s demonstrations primarily focused on high-performance computing (HPC). Thus, CopprLink is likely poised to concentrate on enhancing data transmission for interface connections, striving to provide optimal bandwidth for a myriad of devices on next-generation platforms, with power supply issues not being the primary concern. If CopprLink is closely linked to power delivery, it might endeavor to address some of the challenges currently faced by the 12VHPWR standard. Although the new “12V-2×6 PCIe 6.0” connector design has been released, there appears to be room for further improvement.
PCI-SIG had already released the PCIe 6.0 specifications in January of last year, targeting data-intensive markets such as high-performance computing, data centers, edge computing, artificial intelligence, and machine learning (AI/ML), automotive, the Internet of Things (IoT), and aerospace, among others, thereby fortifying PCI Express’s role as a high-speed interconnect interface. The PCIe 6.0 specification elevates the data transfer rate to 64 GT/s, doubling the rate of the PCIe 5.0 specification, with a 16-lane configuration providing a maximum bi-directional bandwidth of up to 256 GB/s.
Moreover, the PCIe 6.0 specification utilizes encoding based on fixed-size Flow Control Units (Flits), allowing the use of low-latency Forward Error Correction (FEC) and four-level Pulse Amplitude Modulation (PAM4) signaling along with robust cyclic redundancy checks (CRC). Of course, the PCIe 6.0 specification maintains compatibility with previous PCIe technologies, supporting connections with tens of thousands of existing products.