In recent years, AMD has been pushing its semi-custom business to provide customers with a more personalized product portfolio, such as designing custom chips for the
PlayStation 5 and Xbox Series X/S, and the recent big-selling Steam Deck handheld. In addition, AMD is also trying more to use stacking and modular design in chips to meet the needs of different application scenarios, while further improving performance.
At the latest analyst day meeting, AMD Chief Technology Officer (CTO) Mark Papermaster spoke about the latest advancements in semiconductor manufacturing and chip interconnect technology. It seems that AMD’s chip design will move towards modularization in the future, which is likely to be another major strategic move after semi-customization.
Mark Papermaster said that AMD is focusing on making the chip more flexible and easier to expand, and in the future, multiple custom modules can be combined in the chip package. This means AMD’s customers can choose from its IP portfolio, including x86 architecture CPUs, GPUs, FPGAs, and Arm architecture-based chips.
Since AMD is a member of the UCIe Alliance, the new strategy is also based on the UCIe 1.0 specification. It covers the I/O physical layer, protocol, and software stack between chiplets, and utilizes two high-speed interconnect standards, PCI Express (PCIe) and Compute Express Link (CXL). Mark Papermaster acknowledges that it will be easier to add third-party IP to the platform in the future, and there are already quite a few clients actively participating.
AMD and TSMC have a close working relationship. More use of TSMC’s CoWoS (Chip-on-Wafer-on-Substrate) technology, coupled with its own Infinity Fabric bus technology, can provide more room for expansion in HPC and other application environments. From semi-custom to using third-party custom chiplets, AMD seems to want to lead the way in heterogeneous chip designs.