Although TSMC’s 3nm process node will bring benefits in terms of performance and power consumption, the high price of the first-generation N3 process discourages many chip design companies, and the price is rumored to exceed $20,000. At present, the only customer of TSMC’s first-generation N3 process is Apple, and the production capacity in the first half of this year is only slowly climbing.
According to
Wccftech, TSMC may reduce the foundry quotation of 3nm process nodes, including subsequent N3E, N3P, and N3X, to attract more customers, such as AMD, Nvidia, Qualcomm, and MediaTek. Getting there will take some time and be a bit of a risk, but it opens up more opportunities for customers outside of Apple.
Depending on the configuration, an EUV lithography machine costs between $150 million and $200 million. At present, the number of EUV mask layers of the N3 process is 25 layers. The number of EUV mask layers of the N3E process mass-produced in the second half of this year will be reduced from 25 layers to 21 layers. The yield rate is also higher, which can better control manufacturing costs. Some market analysts said that in the second half of this year, TSMC’s main customers in HPC, smartphones, and ASICs may stay in N4/N5, and will choose N3E as the first attempt to cut into the 3nm process node, while the so-called N3B will be mainly limited to Apple’s products.
According to TSMC’s recent report, compared with the existing N5 process, the N3 process has almost no reduction in SRAM cells used for caching, as new generations of high-performance chips demand more cache memory, its size is likely to increase, as well as cost. AMD may adopt a 3nm process on its Zen 5 architecture CPU and RDNA 4 architecture GPU, and Nvidia’s Blackwell architecture GPU may also do so, but it will not be until the second half of 2024.