TSMC is planning the N1 process: Supporting fab in preparation
According to TSMC’s plan, from 2022 to 2025, N3, N3E, N3P, N3X, and other processes will be launched successively, and there will be an optimized N3S process in the future. In addition, FINFLEX technology can be used, which can cover the usage needs of different platforms such as smartphones, the Internet of Things, automotive chips, and HPC. TSMC still uses FinFET transistors at the N3 process node, but the N2 process in mass production in 2025 will use the new Gate-all-around FETs (GAAFET) transistors.
According to relevant media reports, TSMC is making longer-term preparations, and its N1 process is already in the early planning stage. The first fab using the N1 process will be built in a science park in Taoyuan, Taiwan, less than an hour’s drive from Taipei. On the same campus, TSMC already has chip packaging and testing facilities, which is a suitable location to build a fab, which is expected to start production by 2027. It is understood that TSMC’s so-called N1 process may eventually be a 1.4nm process node.
Despite the global economic downturn, TSMC remains committed to advancing the research and development of semiconductor processes and building new fabs for this purpose. TSMC had planned to mass-produce the N3 process this quarter, and the process node is expected to contribute 4% to 6% of its total revenue in 2023. TSMC also rarely discloses the situation of the N2 process. It seems that the transistor structure and process progress have met expectations.
TSMC has not confirmed any details yet and responded to relevant reports.
