TSMC announces the launch of N4X process
The N4X process technology is based on TSMC’s 5nm mass production experience and further technical enhancements to adapt to the characteristics of high-performance computing products, including
- Device design and structures optimized for high drive current and maximum frequency
- Back-end metal stack optimization for high-performance designs
- Super high-density metal-insulator-metal capacitors for robust power delivery under extreme performance loads
“HPC is now TSMC’s fastest-growing business segment and we are proud to introduce N4X, the first in the ‘X’ lineage of our extreme performance semiconductor technologies,” said Dr. Kevin Zhang, senior vice president of Business Development at TSMC. “The demands of the HPC segment are unrelenting, and TSMC has not only tailored our ‘X’ semiconductor technologies to unleash ultimate performance but has also combined it with our 3DFabric™ advanced packaging technologies to offer the best HPC platform.”
The N4X process not only provides more PPA (power, performance, area) advantages but also maintains the same design rules, design infrastructure, SPICE simulation program, and IP. As the use of EUV lithography tools and equipment is further expanded, the number of masks, process steps, risks, and costs can also be reduced. TSMC customers can use the general design rules of the N5 process to accelerate the development of N4X process products.