TSMC announces the launch of N4X process

by ddos ·

TSMC announced that it will launch the N4X process technology. This is TSMC tailor-made for the demanding workloads of high-performance computing (HPC) products. It is also its first technology product focused on HPC. It has the highest performance and frequency in the N5 series of process technology. TSMC said that its “X” suffix stands for Extreme, which is reserved for focusing on HPC technology and is also used in the process name for the first time.
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The N4X process technology is based on TSMC’s 5nm mass production experience and further technical enhancements to adapt to the characteristics of high-performance computing products, including

  • Device design and structures optimized for high drive current and maximum frequency
  • Back-end metal stack optimization for high-performance designs
  • Super high-density metal-insulator-metal capacitors for robust power delivery under extreme performance loads
TSMC said that after a series of optimizations for high-performance computing, N4X will improve performance by 15% compared to N5, or 4% performance compared to N4P at 1.2V operating voltage. In addition, the operating voltage of N4X can be higher than 1.2V to achieve a stronger performance improvement. In addition, the N4 process technology can also achieve greater design flexibility and higher-level performance through 3DFabric advanced packaging technology.

“HPC is now TSMC’s fastest-growing business segment and we are proud to introduce N4X, the first in the ‘X’ lineage of our extreme performance semiconductor technologies,” said Dr. Kevin Zhang, senior vice president of Business Development at TSMC. “The demands of the HPC segment are unrelenting, and TSMC has not only tailored our ‘X’ semiconductor technologies to unleash ultimate performance but has also combined it with our 3DFabric™ advanced packaging technologies to offer the best HPC platform.”

The N4X process not only provides more PPA (power, performance, area) advantages but also maintains the same design rules, design infrastructure, SPICE simulation program, and IP. As the use of EUV lithography tools and equipment is further expanded, the number of masks, process steps, risks, and costs can also be reduced. TSMC customers can use the general design rules of the N5 process to accelerate the development of N4X process products.

Tags: N4X ProcessTSMC