Samsung Improves 3nm Yields, But TSMC Still Leads

In late June 2022, Samsung announced the commencement of 3nm chip production at its Hwaseong facility in South Korea, employing the revolutionary Gate-All-Around (GAA) transistor architecture. However, post-mass production, the yield rate of Samsung’s 3nm GAA process has consistently fallen short of ideal benchmarks.

Recent revelations from netizens suggest that the initial yield rates for Samsung’s 3nm process hovered between 10% and 20%. Despite concerted efforts, recent advancements have more than doubled these figures, yet they still lag behind those of its competitor, TSMC (Taiwan Semiconductor Manufacturing Company), with the yield rates remaining inferior.

Last year, there were whispers of an improvement in Samsung’s 3nm process yield rates, hinting at a potential increase to 60%, which still remains a considerable distance from the acceptable threshold of 70%. This optimistic forecast, however, appears to have been overly ambitious, as evidenced by numerous chip design firms, including Nvidia, exploring partnerships yet ultimately refraining from placing orders, indicating the instability of the yield rates. Samsung’s inability to enhance the yield rates for its 3nm process has led Qualcomm to abandon its plans for the fourth-generation Snapdragon 8 dual-factory initiative, relying solely on TSMC for at least the coming year, with a new outsourcing strategy deferred until 2025.

Previously, Samsung unveiled its semiconductor process technology roadmap up to 2027, outlining the evolution of semiconductor processes following the mass production of SF3E (3nm GAA, 3GAE) in June 2022. This includes the development of second-generation 3nm technology, or SF3, employing the “Second-Generation Multi-Bridge Channel Field Effect Transistor (MBCFET),” which is currently in pilot production.

Rumors abound regarding Samsung’s high expectations for its second-generation 3nm process technology, with power consumption, performance, and area (PPA) metrics potentially rivaling TSMC’s N3P process. Compared to the previous 4nm FinFET process, this new technology promises improvements of 20% to 30% in energy efficiency and density.