Samsung claims that the yield rate of its 3nm process has reached 60 to 70%
In June last year, Samsung announced the commencement of 3nm chip production at its Hwaseong plant in South Korea. As one of the most advanced technologies in semiconductor manufacturing at this stage, Samsung has become the only global foundry offering 3nm process manufacturing services utilizing the next-generation Gate-All-Around (GAA) transistor architecture.
This marks Samsung’s first implementation of GAA’s Multi-Bridge Channel Field-Effect Transistor (MBCFET) application, breaking the performance limitations of the existing FinFET technology. By lowering operating voltage levels to enhance energy efficiency ratios and increasing drive currents to boost chip performance. Subsequently, in December last year, TSMC also announced the initiation of large-scale production of 3nm processes, igniting fierce competition for 3nm process node orders. However, TSMC continues to employ the conventional FinFET (Fin Field-Effect Transistor) technology.
According to FNNews, Samsung claims that the yield rate for its 3nm process production has reached between 60% and 70%. This figure is crucial for attracting customer orders, as wafer orders prioritize yield rates, followed by the cost per wafer. Samsung’s advanced processes were previously considered to have yield rate data manipulation issues, sparking considerable controversy. With the recent improvement in yield rates for 5nm and sub-5nm processes, Samsung is attempting to rebuild confidence among chip designers.
Samsung also unveiled its future plans for the 3nm process node. Following SF3E (3GAE), SF3 (3GAP), and its enhanced version, SF3P (3GAP+), will be gradually introduced between 2023 and 2024. Between 2025 and 2026, the company will transition to the 2nm process node, launching SF2 and SF2P. The more advanced SF1.4 is expected to enter mass production in 2027, a point Samsung also mentioned last year.
