At last year’s “Samsung Foundry Forum 2021” forum event, Samsung confirmed that it has introduced a new GAAFET full-surround gate transistor process at the 3nm process node, which is divided into early 3GAE and 3GAP. Recently, Samsung said it is expected to start mass production using the 3GAE manufacturing process this quarter.
According to Samsung, the MBCFET multi-bridge-channel field-effect transistor process is the first GAAFET process it uses. As a new form, it not only retains the advantages of the GAAFET process but also is compatible with the previous FinFET process technology. 30% performance improvement, 50% lower power consumption, and 80% higher transistor density when using 256Mb GAAFET SRAM chips produced in its 3GAE technology
Samsung said that, in addition to improvements in power consumption, performance, and area (PPA), as the process technology matures, the yield of the 3nm process will be close to that of the 4nm process. However, in view of the problems that Samsung has encountered in 5nm and 4nm chip manufacturing in the past few years, it remains to be seen how the performance and power consumption of the 3nm process will actually be. It is unclear who will be the first customer of Samsung’s 3nm process. After all, there is a certain risk in transitioning to a new transistor process, and chip designers need to develop new IP, and the price is not cheap.
One of its competitors, Intel, still relies on FinFETs at the Intel 7/4/3 process nodes and will switch to a new type of transistor (called RibbonFET) as early as 2024. Another competitor, TSMC, still uses FinFETs at the N4 and N3 process nodes, and will not introduce the GAA process until the N2 process node, which will probably be in production in 2024.