Kioxia and Western Digital announced the launch of 218-layer 3D NAND flash memory
Kioxia and Western Digital have announced the launch of a 218-layer 3D NAND flash memory, employing advanced scaling and wafer bonding technologies to deliver exceptional capacity, performance, and reliability at a highly attractive cost. It is ideally suited to address the exponentially growing storage demands within a wide range of market segments.
The companies have achieved continuous lateral expansion while reducing costs by introducing several unique processes and architectures. Striking a balance between vertical and lateral scaling enables the production of larger capacities in smaller chips with fewer layers, optimizing costs. Both parties have developed a groundbreaking CBA (CMOS directly Bonded to Array) technology, where each CMOS wafer and cell array wafer are separately manufactured in their optimal state, then bonded together to provide enhanced bit density and rapid NAND I/O interface speeds.
The 218-layer 3D NAND flash memory utilizes four planes of 1Tb triple-level cells (TLC) and quad-level cells (QLC) and increases bit density by over 50% through innovative lateral contraction techniques. Its NAND I/O interface speed exceeds 3.2Gb/s, a 60% improvement over the previous generation, coupled with a 20% increase in write performance and read latency, accelerating overall user performance and availability.
Masaki Momodomi, Chief Technology Officer of Kioxia, expressed his delight at successfully launching the eighth-generation BiCS FLASH with the industry’s highest bit density through a unique engineering collaboration with Western Digital. The product is currently available as samples to select customers, and future applications will span data-centric applications, including smartphones, IoT devices, and data centers.