AMD Strix Point Leaked: First Look at MCM Ryzen Design

AMD’s next-generation Zen 5 architecture Ryzen mobile processors are codenamed Strix Point and Strix Halo, with Strix Point confirmed for release later this year. Strix Halo’s release date is uncertain, potentially this year or at CES next year. Strix Halo is an enthusiast-level laptop processor featuring up to 16 Zen 5 CPU cores and 40 RDNA3+ CU GPU cores.

@Olrak_29 has unveiled renderings of Strix Point, which employs an MCM design, consisting of three chips: two CCDs and one GCD. Each Zen 5 core possesses 1MB of L2 cache, and each CCD comprises 8 cores and 32MB of L3 cache, resulting in a total of 16MB L2 cache and 64MB L3 cache, with the two CCDs connected to the GCD via an IF bus.

The IOD is replaced by the GCD, essentially an IOD integrated with a large-scale integrated GPU. The chip size is significantly larger than the two CCDs. Besides integrating a 40-CU RDNA3+ GPU, it also includes an XDNA 2 NPU with over 40 TOPS of computational power, 32MB of MALL Cache, and a 256-bit LPDDR5x memory controller, potentially featuring Zen 5 LP cores.

The current RX 7600 XT only has 32 CUs, making the 40 CU integrated GPU in Strix Halo considerably large. However, unlike gaming console SoCs that use GDDR6 for memory, Strix Halo uses LPDDR5x with a maximum frequency of 8000MHz. To mitigate the memory bandwidth limitation, 32MB of MALL Cache has been added.

According to previous information, Strix Halo’s standard TDP should be 70W, with manufacturers able to adjust the CPU TDP up to over 130W based on the device’s thermal design. It uses the FP11 platform and supports DP2.1 and UHBR20 video output.