AMD Radeon RX 7800 XT has a smaller package size than Navi 31
AMD has officially unveiled the Navi 31 and Navi 33 GPUs based on the RDNA 3 architecture, corresponding to the desktop platform’s Radeon RX 7900 series and Radeon RX 7600 graphics cards, both of which are currently available in the market. Reports suggest that the Radeon RX 7800 XT graphics card will be released between the end of the third quarter and the beginning of the fourth quarter of 2023, likely featuring the Navi 32 architecture. The recent exposure of what appears to be a physical Navi 32 GPU aligns with this logical progression.
Recently, Moore’s Law is Dead made a new revelation stating that the chip powering the Radeon RX 7800 XT is neither Navi 32 nor Navi 31, but rather a “brand new” chip developed by AMD, positioned between the two. This chip shares the same GCD as the Navi 31, measuring 350mm², but has a smaller package size, similar to Navi 32, at 40 x 40 mm. Although it has six MCDs, only four are functional, while the remaining two are dummy modules. The corresponding memory bus width for this GPU is 256 bits, with an Infinity Cache of 64MB.
Rumors suggest that the Navi 32 features 60 CUs, equivalent to 3840 stream processors, while the Navi 31 has 96 CUs, totaling 6144 stream processors, indicating a notable difference in scale between the two. The introduction of this downsized version of Navi 31 implies that, with the same memory configuration as Navi 32, it possesses stronger computational capabilities, with the CU count expected to be between 60 and 84. It is known that AMD has been shipping prototypes of this chip to its partners in recent months.
By reducing two MCDs, the manufacturing cost of the new chip is lower compared to Navi 31, narrowing the performance gap between the Radeon RX 7800 XT and the Radeon RX 7900 XT. This allows for greater flexibility in positioning and pricing. There are even speculations that the new chip might find its way into the mobile platform, creating the Radeon RX 7900M series, where the smaller package size and narrower memory bus width can save valuable PCB space.
