AMD may choose 3nm to manufacture “Zen 5c” CCD
During the earnings call for the fourth quarter of 2023, Dr. Lisa Su, CEO of AMD, confirmed the company’s plans to launch the next-generation Zen 5 architecture in the latter half of 2024. This upcoming lineup includes the Granite Ridge for desktop platforms, Strix Point for mobile platforms, and Turin for server platforms. Earlier reports indicated that the new Zen 5 series architecture would encompass three designs: Zen 5, Zen 5 V-Cache, and Zen 5c, with versions produced in both 4nm and 3nm processes.
According to TechPowerup, the CCDs based on the Zen 5c and Zen 5 architectures will be manufactured using two distinct processes: the former at 3nm and the latter at 4nm, with mass production slated for the second quarter of 2024. This suggests that AMD’s forthcoming major products, including Granite Ridge, Fire Range, and Turin featuring the Zen 5 architecture CCDs, will all be built on the 4nm process.
The Zen 5c chips are understood to feature 32 cores, divided into two CCXs of 16 cores each, with each CCX sharing 32MB of L3 cache, and each core equipped with 1MB of L2 cache. Beyond the increased core count and larger cache capacity, the transition to more advanced manufacturing processes for the Zen 5c architecture CCDs may also be driven by the potential for lower operating voltages. EPYC server processors utilizing the Zen 5c architecture could be configured with up to six CCDs, providing up to 192 cores. In contrast, CCDs based on the Zen 5 architecture will have a single CCX with eight cores, sharing 32MB of L3 cache. If designed with Zen 5 V-Cache, these would feature even larger L3 cache capacities.
Looking ahead, AMD is also expected to introduce a “big.LITTLE” core architecture, combining Zen 5 and Zen 5c in a single-chip design, likely manufactured using the 4nm process.
