AMD is hiring RISC-V architecture engineers
AMD’s Radeon Technology Group (RTG) is hiring a RISC-V CPU/GPU micro architect for its existing embedded RISC-V architecture team. This shows that AMD may develop solutions based on the RISC-V architecture for use in its related products in the future.
According to AMD’s job description, the main responsibilities of this position are:
- Work with a team of architects developing innovative embedded RISC-V CPUs.
- Identify complex technical problems, break them down, summarize multiple possible solutions, and help the team make advances in Performance, Power, and silicon Area (PPA).
- Understand and improve existing and emerging graphics/compute paradigms and new APIs employing RISC-V processors.
- Work with architects to understand bottlenecks and other problems where an embedded processor will improve the performance.
- Propose innovative solutions that can be implemented in HW with the best PPA characteristics
- Analyze CPU workloads and make recommendations for improvements.
AMD expects the engineer to have RTL design experience, GPU experience, knowledge of branch predictors and register renaming, out-of-order execution, CPU principles of speculative execution, and RISC-V RV64 CPUs. The location of its work is Orlando, Florida, where a design team from Radeon Technology Group is located.
In fact, AMD’s rivals Intel and Nvidia both have worked on the RISC-V architecture. Intel and RISC-V architecture chip design company SiFive have already cooperated to build their own RISC-V development platform Horse Creek using each other’s technology. Intel even intends to acquire the other party, and the related IP of SiFive can use Intel’s foundry service business (IFS) in the future. Some NVIDIA Turing architecture and Ampere architecture GPUs have a module called GSP (GPU System Processor) inside, based on the RISC-V architecture, it is used to take over GPU initialization and management tasks. In addition, the Bluefield series DPU also has a RISC-V accelerator.
