Zen 5 Hits GCC: AMD Preps Next-Gen Architecture

As early as mid-last month, AMD unveiled support for the Zen 5 microarchitecture in GCC, pre-announcing the “znver5” target. On March 18th, Eastern Time, AMD officially submitted the initial version of the Zen 5 microarchitecture patch for support in the forthcoming stable release of GCC.

According to the website Phoronix, this patch does not constitute full support for the Zen 5 architecture but rather adds support for a variety of instruction sets based on the Zen 4 architecture, including AVXVNNI, MOVDIRI, MOVDIR64B, AVX512VP2INTERSECT, and PREFETCHI instructions. AMD has indicated that the stable version of GCC 14.1 will be released in the coming weeks, and the first Zen 5 products to hit the market will be the mobile platform’s Strix Point and the desktop platform’s Granite Ridge series, both expected to launch in the latter half of this year.

Previously, we reported that among the newly added instruction sets, AVX-VNNI stands out the most as it belongs to the vector neural network instructions, which become indispensable as artificial intelligence (AI) gains increasing significance. Intel had already supported this instruction set with its Alder Lake in 2021, and now with AMD’s Zen 5 processors also supporting this instruction set, it undoubtedly strengthens AMD’s competitiveness in the market and accelerates the popularization of artificial intelligence (AI) in the PC domain.

Since July of the previous year, code related to the Zen 5 architecture has been emerging continually, with ongoing updates in support for Linux, including new power management features. However, AMD has not disclosed more information about the Zen 5 processors. The extent of improvement in traditional performance and capabilities in processing large language models of Zen 5 processors will only become clear after their launch in the second half of the year.