Samsung will produce the first batch of 3nm chips in the first half of 2022
At the “Samsung Foundry Forum 2021” held by Samsung, Dr. Siyoung Choi, president and head of Samsung’s foundry business, introduced its semiconductor process research and development and mass production and announced a new version of the technology roadmap. This indicates that Samsung will continue to develop advanced semiconductor manufacturing technologies and compete with Taiwan Semiconductor Manufacturing Co. (TSMC) and Intel in the foundry market.
Image: Samsung
In order to catch up with TSMC in the semiconductor process, Samsung has introduced a new GAAFET all-around gate transistor process at the 3nm process node, which is divided into the early 3GAE and 3GAP. Although it has been successfully taped out in the first half of this year, due to the high technical difficulty, the first-generation 3nm process has been postponed to mass production in the first half of 2022, and the second-generation 3nm process will be mass-produced in 2023. The MBCFET multi-bridge-channel field-effect transistor process is a brand-new form of the GAAFET process, which not only retains the advantages of the GAAFET process but is also compatible with the previous FinFET process technology. The 2nm process node (MBCFET) in the new version of the technology roadmap will be put into production in 2025.
Samsung said that compared with the original 5nm process, the first 3nm GAA process node using the MBCFET process reduces the chip area by 35%, improves performance by 30%, or reduces power consumption by 50%. In addition to improvements in power consumption, performance, and area (PPA), as the process technology matures, the yield rate of the 3nm process will be close to that of the 4nm process. One of its competitors, Intel, still relies on FinFET at the Intel 7/4/3 process node and will switch to a new type of transistor (called RibbonFET) as early as 2024. Another competitor, TSMC, still uses FinFETs at the N4 and N3 process nodes. GAA process will not be introduced until the N2 process node, and it will probably be put into production in 2024.
In addition, Samsung also introduced the 17LPV process for CIS, DDI, and MCU, that is, the 17nm process of Low Power Value. This is an evolution of the 28nm process. The FinFET process technology used in the 14nm process is added to the 28nm process to enjoy new technological advantages at a relatively low cost. Compared with the original 28nm process, the chip area can be reduced by 43%, performance can be improved by 39%, or power consumption can be reduced by 49%.
