Samsung introduces its second-generation 3nm process

In June last year, Samsung commenced mass production of its SF3E (3nm GAA), marking the company’s inaugural implementation of GAA “Multi-Bridge-Channel Field-Effect Transistor (MBCFET)” technology. This breakthrough shattered the performance constraints of the conventional FinFET, introducing the novel GAA (Gate-All-Around) transistor architecture to enhance the energy-efficiency ratio by lowering operational voltage levels while also amplifying chip performance through increased driving current.

The 2023 VLSI Technology and Circuit Symposium is scheduled to take place in Kyoto, Japan, from June 11th to 16th, 2023. According to official announcements, Samsung will present its second-generation 3nm process technology dubbed SF3 (3GAP), utilizing the “second-generation Multi-Bridge-Channel Field-Effect Transistor (MBCFET)” and further optimizing the original SF3E.

Samsung 3nm process yield

Samsung claims that compared to SF4 (4LPP, 4nm low-power process), SF3 offers a 22% performance improvement at the same power and transistor count, a 34% reduction in power consumption at the same frequency and complexity, and a 21% reduction in the logic area. However, Samsung has not compared SF3 to SF3E, nor provided information on SRAM and analog circuit scaling.

One key advantage of GAA over FinFET is reduced leakage current, while channel thickness can be adjusted to increase performance or lower power consumption. Samsung states that the new SF3 provides greater design flexibility, utilizing MBCFET devices of varying widths. It remains unclear whether the current SF3E lacks one of the most critical technologies in GAA transistor architecture, but Samsung’s presentation seems to imply this possibility.

With SF3, Samsung has the potential to compete with TSMC’s advanced processes in 2024. Samsung recently admitted its semiconductor manufacturing process is trailing TSMC’s but considers the earlier adoption of GAA transistor technology an advantage, aspiring to surpass TSMC within five years.

Samsung is also refining its 4nm process, aiming to close the gap with competitors through SF4P (4LPP+), expected to enter mass production later this year. Furthermore, Samsung plans to launch SF4X (4HPC) for high-performance CPUs and GPUs. However, around the same time, TSMC will introduce an enhanced 3nm process called N3P.