Intel released the Arrow Lake and Lunar Lake instruction set reference guide

Although the advent of Arrow Lake and Lunar Lake remains a considerable stretch away, Intel has already initiated preliminary endeavors pertaining to these upcoming processors. To adequately prepare their ISV ecosystem for the burgeoning technologies of future microarchitectures, Intel periodically publishes instruction set reference guides. In the most recent of such guides, the monikers “Arrow Lake” and “Lunar Lake” have been introduced for the first time, signifying two forthcoming client processors.

Intel Arrow Lake CPU

According to the guide’s content, both Arrow Lake and Lunar Lake will endorse a series of instructions, including AVX-VNNI-INT16, SHA512, SM3, and SM4, all of which are specifically concentrated on AI workloads. Of particular interest is AVX-VNNI, an instruction set designed to enhance the performance of neural network inference workloads by providing dedicated capabilities for 8-bit and 16-bit integer operations. This suggests that applications harnessing the power of artificial intelligence, machine learning, and deep learning algorithms can anticipate enhanced processing speed and efficiency.

The decision to support SHA512, SM3, and SM4 in the new processors signifies Intel’s intent to augment the security and encryption capacities of their next-generation client processors. SHA512, a widely utilized encryption hash function, facilitates the reinforcement of data integrity and the security of data transmission. Intel has also acknowledged support for SM3 and SM4 encryption hash algorithms used in communications within the document, with the alterations underscored in purple for ease of reading.

Moreover, like contemporaneous server products Sierra Forest and Grand Ridge, Arrow Lake, and Lunar Lake also back Intel’s Linear Address Masking (LAM) instruction, permitting software to use the untranslated address bits of a 64-bit linear address as metadata.