Apple M1 Ultra chip uses the TSMC InFO_LI package
With the release of the Mac Studio, Apple introduced the M1 Ultra, the most powerful chip in the M1 series. Through a packaging architecture called UltraFusion, Apple interconnected two M1 Max chips, extending Apple chips to new heights never before possible, giving the Mac Studio incredible computing power.
The M1 Ultra is composed of 114 billion transistors, configured with up to 128GB of high bandwidth (up to 800 GB/s), low-latency unified memory, plus the highest 20-core CPU (16 performance cores + 4 energy efficiency cores), 64 cores GPU and 32-core NPU. Each performance core has 192KB instruction cache, 128 KB data cache, and a total of 48MB of L2 cache, and each energy-efficient core has 128KB of instruction cache, 64KB of data cache, and a total of 8MB of L2 cache. The interposer of the UltraFusion package architecture has more than 10,000 signal pins, providing a low-latency bandwidth between processors of 2.5 TB/s.
It is generally believed that Apple’s UltraFusion packaging architecture is based on TSMC’s CoWoS (Chip-on-Wafer-on-Substrate), a 2.5D packaging technology that can package multiple small chips onto a single substrate. However, Tom Wassick, a professional in semiconductor packaging, released a related slideshow that reveals the M1 Ultra adopts a TSMC packaging method named “InFO_LI”, which belongs to the wafer-level packaging of local chip interconnection.
Although CoWoS has been verified and adopted by many design manufacturers, the cost of InFO_LI is lower in comparison. In addition to the cost factor, Apple did not choose CoWoS because the M1 Ultra only needs to interconnect two M1 Max chips, including memory and GPU, which are already part of the chip, and no other components are required. Unless Apple uses a multi-chip design or has faster HBM memory, there is no need to choose the more expensive CoWoS.
