AMD responded to the question about the Ryzen 7000 series CPUs

AMD introduced the Ryzen 7000 series CPUs based on the Zen 4 architecture and the corresponding AM5 platform at Computex 2022. The new generation of Zen 4 architecture products code-named Raphael will use a new AM5 socket (LGA 1718) integrate an RDNA 2 architecture GPU, and support PCIe 5.0, and dual-channel DDR5 memory. However, in the keynote, some details involving the Ryzen 7000 series CPUs were not included, and only gradually became clear in the past few days.

In an interview, AMD technical marketing director Robert Hallock confirmed that the first batch of Ryzen 7000 series CPUs to be launched will have a maximum specification of 16 cores and 32 threads; the Zen 4 architecture isn’t just for the high end either; the GPU is standard and the specifications are the same in each model. The GPU is included in the IOD manufactured by the 6nm process and has only a small number of computing units. The function is similar to the Ryzen 6000 series. In the future, the AM5 platform will still have APU. Zen 4 architecture will not support DDR4 memory, suppliers are very optimistic about DDR5 memory, future products will be very rich, and DDR5-6400 can be reached in the early stage. The computing chips in the photo appear to be gold-plated, but in fact, a process called “back-side-metallization” is used to refract light in different colors depending on how the chips are made.

While the TDP cap has also been raised to 170W, AMD will still offer products with TDPs of 65W and 105W. CPU coolers with TDP of 65W and 105W in the past can still be used for the AM5 platform. In order to ensure compatibility with the AM4 platform, including maintaining the same package size, length, and width, and the same Z height, the new Ryzen 7000 series CPUs have been cut out on the top cover to make room for capacitors. Robert Hallock believes that the existing high-end air-cooled and water-cooled radiators will still perform well. He said that his host using the Ryzen 9 5950X is now using Noctua’s D-15, and will continue to use it when he plans to upgrade to the AM5 platform.

Robert Hallock clarified the actual meaning of “AI Acceleration” mentioned in the slide, he said that these AI accelerations will be based on AVX 512 VNNI and BFLOAT16/BF16, widely used by TensorFlow, AMD ROCm, and even NVIDIA CUDA libraries.

Robert Hallock also explained why the chipset with the “E” suffix was introduced, saying that the new PCIe standard will increase the cost of motherboards. AMD’s strategy on chipset features has not changed, and some overclocking features will be available on the B650 and X670.

Regarding the configuration of PCIe 5.0 lanes, Robert Hallock said that the CPU has a total of 28 PCIe 5.0 lanes, 4 of which are used for downlink, which is why some places mention that the number of PCIe 5.0 lanes is 24. The 24 PCIe 5.0 lanes actually used by the CPU can be installed with a single graphics card (x16 slot) or dual expansion cards (two x8 slots), and the remaining 8 PCIe 5.0 lanes can be configured with two M.2 slots. Other configurations can be made as needed.

In addition, AMD will explain the configuration of USB and some new power management functions of the new platform at a later date. At the same time, AMD does not require a Wi-Fi 6E module, and motherboard manufacturers can choose flexibly from the perspective of function and cost. AMD will also release the division of IPC and frequency contribution, as well as the performance, power, and area of ​​the new process.