AMD confirms to use optimized TSMC 5nm process
AMD began to use TSMC’s 7nm process technology in 2019 and launched Zen 2 architecture processors. Leading the process node was one of the most important features of new products at that time. Thanks to TSMC’s N7 process node, AMD is very competitive in both the desktop and enterprise markets. As Intel advances from 14nm to 10nm process technology, AMD will also start moving from 7nm to 5nm in the second half of 2022 and introduce it into Zen 4 architecture products.
At a conference at this year’s CES, Anandtech asked AMD CEO Dr. LiSa Su whether process node leadership was the key to staying competitive for AMD products. Especially considering the small chip design and the cost of advanced process input.
Dr. Lisa Su said that AMD is constantly innovating in various fields, and the leading small chip design technology helps to integrate together through packaging. At present, AMD has a strong ability to deliver products using the 7nm process and has launched products using the 6nm process, followed by the Zen 4 architecture and the 5nm process. AMD has chiplet designs for 2D and 3D and will use the right technology to do so. Dr. Lisa Su emphasized that the technology roadmap is about making the right choices and the right timing, and confirmed that the 5nm process technology used by AMD will be optimized for high-performance computing and not necessarily identical to other existing 5nm technologies.
According to AMD, in the chiplet era, the combination and packaging methods are becoming more and more important, even more, important than what kind of process node is used. In addition, in order to meet the performance needs of different types of chips, foundries will make targeted adjustments on the same process node. TSMC currently has at least three processes involving the N7 process node.
It is understood that TSMC has accepted a total of $5.44 billion in advance payments from at least 10 customers, including Apple, AMD, Nvidia, and Qualcomm, to ensure future capacity supply.