Nintendo Switch 2 specs leaked: NVIDIA Ampere architecture GPU, supports DLSS 2.2
Previously TechPowerUp received screenshots provided by Anonymous, the NVIDIA DLSS source code files are shown on the list, the content of the documentation looks very plausible, and it is the newer DLSS version 2.2. NVIDIA DLSS is a proprietary technology that NVIDIA has been promoting in recent years. It is considered one of the technical means superior to competitors. If the source code leaks and its principles are known to others, it will be a huge loss for NVIDIA.
“Nintedo Switch Joy-Con Set” by brettchalupa is licensed under CC BY 2.0
Twitter user @NWPlayer123 found that “NVN2” was mentioned in the NVIDIA DLSS source code file, which is said to be the graphics API of Nintendo’s next-generation Switch (Switch 2 or Switch Pro) game console. Through further exploration of the leaked files, some users found that APIs involving NVN2 will be used with Ampere architecture GPUs, not only supporting DLSS 2.2 but also supporting ray tracing technology.
What’s more interesting is that the T234/T239 SoC is also mentioned in the document, and Twitter user @kopite7kimi speculates that this is the core used by the new generation of Nintendo Switch 2. These SoCs are custom designs based on Orin and may be codenamed, Dane or Drake. Orin was originally Nvidia’s system-on-chip for autonomous driving and robotics, consisting of 17 billion transistors.
It is understood that the CPU of the custom SoC is 12 cores, using the Arm Cortex-A78AE (Hercules) core. The GPU is likely to be a GA10F based on the Ampere architecture, with 2048 CUDA cores, and possibly AV1 support likely manufactured on an 8nm process. Some specific designs or frequencies of the chips may be different compared to Orin.
Although the leaked Nvidia documents this time can confirm that the specifications of the relevant chips are real, it’s not certain that this is the final specification of the next-generation Nintendo Switch, and it may be used by other products or an unreleased console version of the chip.
