Intel says Sapphire Rapids will have 64GB HBM2e

At the recently held Supercomputing 2021, Intel further disclosed information on a new generation of Xeon scalable processors called Sapphire Rapids

According to HardwareLuxx, Intel has confirmed that it will launch two Sapphire Rapids processors, the difference is whether it is equipped with HBM2e memory. At this conference, Intel stated that Sapphire Rapids processors equipped with memory will use four sets of HBM2e, each with a capacity of 16GB, and there will always be 64GB of memory. The peak bandwidth is between 1.432 TB/s and 1.640 TB/s and will share sockets with regular Sapphire Rapids processors. If you usually pay attention to Sapphire Rapids processor-related news, you will not be surprised, as early as last December, there were rumors in this regard.

The Sapphire Rapids processor of the Eagle Stream platform will be equipped with up to 56 cores, using the Golden Cove architecture, manufactured with a 10nm Enhanced SuperFin process, and a TDP of 350W. The next-generation platform also supports PCIe Gen5, CXL 1.1 (Compute Express Link), and eight-channel DDR5 memory, while continuing Intel’s built-in AI acceleration strategy and supporting Intel’s Advanced Matrix Extensions (AMX).

Intel also confirmed Ponte Vecchio’s L1 and L2 cache configurations, which are 64MB and 408MB, respectively, using HBM2e. As the GPU used in the data center, it will be used in supercomputers such as Aurora and will partner with Sapphire Rapids. It is understood that the Aurora supercomputer will use more than 18,000 Sapphire Rapids processors and more than 54,000 Ponte Vecchio computing cards. A single computing node will be equipped with two Sapphire Rapids processors and six Ponte Vecchio computing cards, which are connected to each other through the Xe-Link protocol full-to-full topology.

In addition, Intel is also cooperating with SiPearl to deploy supercomputers in Europe. SiPearl is currently developing a processor based on the Arm architecture, named Rhea, which will be manufactured using TSMC’s 7nm process, while Ponte Vecchio, based on the Xe-HPC architecture, has been selected to build heterogeneous computing nodes.