Intel targets 30% to 50% logic scaling improvements

At the recently held 2021 IEEE International Electron Devices Meeting (IEDM), Intel outlined its future technology development direction and introduced key technologies in packaging, transistors, and quantum physics. Intel said that the current major breakthroughs in brand-new power devices and memory technologies, and these new technologies derived from new concepts in physics, are likely to redefine computing in the future.

First of all, Intel will provide more transistors in future products, and for this purpose, it will focus on the core miniaturization technology. By adopting solutions to the design, process, and assembly problems in hybrid bonding interconnection, Intel expects to increase interconnection density by more than 10 times in the packaging. In order for the ecosystem to benefit from advanced packaging, Intel calls for the establishment of new industry standards and testing procedures to make the hybrid bonding chiplet ecosystem possible.

Intel looks forward to its GAA RibbonFET (Gate-All-Around RibbonFET) technology, by stacking multiple (CMOS) transistors, up to 30% to 50% of logic scaling is improved, and more transistors can be accommodated per square millimeter. In the future, it will overcome the limitations of traditional silicon channels and use new materials with a thickness of only a few atoms to fabricate transistors to increase the number of transistors on each chip and achieve more powerful computing performance.
Second, Intel injects new features into silicon. By integrating GaN-based power devices and silicon-based CMOS on a 300mm wafer for the first time, a more efficient power supply technology is realized. It creates conditions for the CPU to provide low-loss and high-speed power transmission, while also reducing motherboard components and space.

Intel also intends to use new ferroelectric materials as a viable solution for the next generation of embedded DRAM technology. New technologies can provide greater memory resources and low-latency reading and writing capabilities to solve the current responsible problems faced in applications ranging from games to artificial intelligence computing.

Finally, Intel is working to improve the quantum computing performance of silicon-based semiconductors. Through the development of new devices that can perform high-efficiency and low-power calculations at room temperature to gradually replace traditional MOSFET transistors. At this conference, Intel demonstrated the world’s first normal temperature magnetoelectric spin-orbit (MESO) logic device. It is possible in the future to manufacture new transistors based on nanometer-scale magnet devices.

At present, Intel has made progress in the research of spintronic materials, bringing device integration research close to realizing the full practicality of spintronic devices. Intel also showcased full 300 mm qubit process flows for the realization of scalable quantum computing that is compatible with CMOS manufacturing and identifies the next steps for future research.
Robert Chau, Intel Senior Fellow, and general manager of Components Research says
At Intel, the research and innovation necessary for advancing Moore’s Law never stops. Our Components Research Group is sharing key research breakthroughs at IEDM 2021 in bringing revolutionary process and packaging technologies to meet the insatiable demand for powerful computing that our industry and society depend on. This is the result of our best scientists’ and engineers’ tireless work. They continue to be at the forefront of innovations for continuing Moore’s Law.”