Synopsys launches industry’s first complete HBM3 IP and verification solution

Synopsys launched the industry’s first complete HBM3 IP and verification solution, including controllers, physical interfaces (PHY), and verification IP for 2.5D multi-chip packaging systems, to meet the requirements of designers using HBM3 to design high-bandwidth and low-power memory for system-on-chip (SoC) for high-performance computing, artificial intelligence and graphics applications.

Synopsys’ HBM3 controller supports 16 64-bit physical channels or 1024-bit interfaces, and the controller with PHY supports HBM3 memory stacks with different layers, with a capacity of up to 64GB and a data transfer rate of up to 7200 MT/s. A typical SoC that supports HBM has two, four, or six controllers, so in Synopsys’ HBM3 solution, the memory bandwidth of an SoC equipped with four HBM3 stacks reaches 3.68 TB/s. At the same time, the controller also supports error correction code (ECC), refresh management, and parity check, and can be used in data centers and high-performance computing (HPC) applications that require various RAS (reliability, availability, scalability) functions.

Rambus HBM3-Ready Memory Subsystem
At present, Synopsys’ HBM3 solution has been approved by Micron, Samsung, and SK Hynix. These memory manufacturers have expressed their commitment to the production of HBM3 memory. Synopsys’ HBM3 solution includes DesignWare HBM3 controller, PHY, verification IP, and 3DIC compiler. Synopsys said that its HBM3 controller and PHY are mainly based on HBM2E IP that has passed 5nm verification, which means that risks are reduced. At the same time, Synopsys’ HBM3 controller uses the proven DFI 5.0 interface to connect to the PHY, and the 3DIC compiler has a complete HBM3 automatic routing solution, which enables fast and robust design and development.

Synopsys continues to address the design and verification requirements of data-intensive SoCs with high-quality memory interface IP and verification solutions for the most advanced protocols like HBM3, DDR5 and LPDDR5,” said John Koeter, senior vice president of marketing and strategy for IP at Synopsys. “The complete HBM3 IP and verification solutions enable designers to meet increasing bandwidth, latency and power requirements while accelerating verification closure, all from a single, trusted provider.”