Samsung introduces the industry’s first 512GB CXL memory module
Samsung announced that it has developed the industry’s first 512GB Compute Express Link (CXL) DRAM, an important step towards the commercialization of CXL, which not only enables extremely high memory capacity but also enables lower latency in the system. Since launching the industry’s first FPGA-based CXL DRAM prototype in May 2021, Samsung has been working closely with the data centers, enterprise servers, and chipset companies to develop improved, customizable CXL devices.
According to Samsung, this new CXL memory module is the first product to use 512GB DDR5 memory, equipped with a dedicated controller, support PCIe 5.0 interface, and use EDSFF size. With four times the capacity of the previous version and one-fifth the system latency, it is ideal for the next generation of enterprise servers and data centers that require massive storage.
Samsung also plans to release an upgraded version of the Scalable Memory Development Kit (SMDK) for CXL (Compute Express Link) memory modules to encourage more manufacturers to deploy CXL memory modules into existing and future IT systems. This is a set of open-source software solutions designed to provide related development support for the platform of CXL memory modules.
“CXL DRAM will become a critical turning point for future computing structures by substantially advancing artificial intelligence (AI) and big data services, as we aggressively expand its usage in next-generation memory architectures including software-defined memory (SDM),” said Cheolmin Park, vice president of Memory Global Sales & Marketing at Samsung Electronics, and Director of the CXL Consortium. “Samsung will continue to collaborate across the industry to develop and standardize CXL memory solutions, while fostering an increasingly solid ecosystem.”
“CXL DRAM will become a critical turning point for future computing structures by substantially advancing artificial intelligence (AI) and big data services, as we aggressively expand its usage in next-generation memory architectures including software-defined memory (SDM),” said Cheolmin Park, vice president of Memory Global Sales & Marketing at Samsung Electronics, and Director of the CXL Consortium. “Samsung will continue to collaborate across the industry to develop and standardize CXL memory solutions, while fostering an increasingly solid ecosystem.”
As an open interconnection protocol, CXL has higher bandwidth, enabling high-speed and efficient interconnection between CPU and GPU, FPGA, or other accelerators, meeting the requirements of today’s high-performance heterogeneous computing, and providing higher bandwidth and better memory consistency.
