AMD Zen 5 architecture will improve the cache structure, IPC will increase by 22% to 30%
AMD announced a new CPU product roadmap at the Financial Analyst Day event in June last year. It shows that the Zen 4 architecture will include Zen 4, Zen 4 V-Cache, and Zen 4c three cores, with 5nm and 4nm versions respectively, by 2024, AMD plans to launch a new Zen 5 architecture, which also has three versions: Zen 5, Zen 5 V-Cache and Zen 5c, and there will be 4nm and 3nm versions.
According to RedGamingTech, the AMD Zen 5 architecture may have a 22% to 30% increase in IPC compared to the Zen 4 architecture. AMD’s Zen 5 architecture is still 8 cores per CCX, with a lack of additional cores due to no improvements in Infinity Fabric. It is rumored that the flagship Ryzen 9 8000 series will have up to 32 Zen 5 architecture cores, which means it will consist of 4 CCXs.
AMD will also improve the cache structure of the Ryzen 8000 series processors, increase the L1 cache, and the L2 cache may be unified on one CCX. The L3 cache may be shared by all cores, or the existing design may be maintained. If it is the latter, then AMD may add a shared MCD as an L4 cache, but this will only be used for the APU.
It is reported that AMD intends to introduce a hybrid architecture design on the Zen 5 architecture, similar to Intel. In fact, there were rumors last year that the APUs that also belong to the Ryzen 8000 series will adopt a hybrid architecture, with a Zen 5 architecture large core paired with a Zen 4c architecture small core, and the GPU part will use the RDNA 3+ architecture.
